CP4/CP5/CP6
16 64-bit general purpose registers (c0 .. c15)
4 72-bit accumulators (a0 .. a3)
1 status and control register (dspsc)

from memory to crunch:
	cfldrs mvf0, [%0], #4		mvf[63:32] = [0]
	cfldr32 mvfx0, [%0], #4		mvf[31:0] = [0], sign extend
	cfldrd mvd0, [%0], #4		mvd[63:0] = [0]
	cfldr64 mvdx0, [%0], #4		mvd[63:0] = [0] (same as cfldrd?)

from crunch to memory:
	cfstrs mvf0, [%0], #4		[0] = mvf[63:32]
	cfstr32 mvfx0, [%0], #4		[0] = mvf[31:0]
	cfstrd mvd0, [%0], #4		[0] = mvd[63:0]
	cfstr64 mvdx0, [%0], #4		[0] = mvd[63:0] (same as cfstrd?)

from arm to crunch:
	cfmvsr mvf0, r0			c0[63:32] = r0
	cfmvdhr mvd0, r0		c0[63:32] = r0 (identical)
	cfmv64hr mvdx0, r0		c0[63:32] = r0 (identical)
	cfmvdlr mvd0, r0		c0[31:0] = r0
	cfmv64lr mvdx0, r0		c0[31:0] = r0, sign extend

from crunch to arm:
	cfmvrs r0, mvf0			r0 = c0[63:32]
	cfmvrdh r0, mvd0		r0 = c0[63:32] (identical)
	cfmvr64h r0, mvdx0		r0 = c0[63:32] (identical)
	cfmvrdl r0, mvd0		r0 = c0[31:0]
	cfmvr64l r0, mvdx0		r0 = c0[31:0] (identical)

from crunch to accumulator:
	cfmvah32 mvax0, mvfx0		mva0[71:64] = c0[7:0]
	cfmvam32 mvax0, mvfx0		mva0[63:32] = c0[31:0]
	cfmva64 mvax0, mvdx0		mva0[63:0] = c[63:0], sign extend
	cfmval32 mvax0, mvfx0		mva0[31:0] = c0[31:0]
	cfmva32 mvax0, mvfx0		mva0[31:0] = c[31:0], sign extend

=========================

from accumulator to crunch:
	cfmv32ah mvfx0, mvax0		c0[7:0] = mva0[71:64]
	cfmv32am mvfx0, mvax0		c0[31:0] = mva0[63:32]
	cfmv32al mvfx0, mvax0		c0[31:0] = mva0[31:0]
	cfmv32a mvfx0, mvax0		c0[31:0] = mva0[31:0], saturate?
	cfmv64a mvdx0, mvax0		c0[63:0] = mva0[63:0], saturate?

from crunch to dspsc:
	cfmvsc32 dspsc, mvdx0		dspsc = mvdx0

from dspsc to crunch:
	cfmv32sc mvdx0, dspsc		mvdx0 = dspsc